IFIP TC6 Open Digital Library

VLSI-SoC 2008: Rhodes Island, Greece - Selected Papers

VLSI-SoC: Design Methodologies for SoC and SiP - 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008, Revised Selected Papers

Christian Piguet, Ricardo Reis, Dimitrios Soudris

Springer, IFIP Advances in Information and Communication Technology 313, ISBN: 978-3-642-12266-8



Contents

Physical Design Issues in 3-D Integrated Technologies.

Vasilis F. Pavlidis, Eby G. Friedman

 1-21

Universal Methodology to Handle Differential Pairs during Pin Assignment.

Tilo Meister, Jens Lienig, Gisbert Thomke

 22-42

Analysis and Design of Charge Pumps for Telecommunication Applications.

Vasilios Kalenteridis, Konstantinos Papathanasiou, Stylianos Siskos

 43-60

Comparison of Two Autonomous AC-DC Converters for Piezoelectric Energy Scavenging Systems.

Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani

 61-80

Trapping Biological Species in a Lab-on-Chip Microsystem: Micro Inductor Optimization Design and SU8 Process.

Christophe Escriba, Remy Fulcrand, Philippe Artillan, David Jugieu, Aurélien Bancaud, Ali Boukabache, Anne Marie Gué, Jean-Yves Fourniols

 81-96

Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs.

Ian O'Connor, Ilham Hassoune, David Navarro

 97-113

Timed Coloured Petri Nets for Performance Evaluation of DSP Applications: The 3GPP LTE Case Study.

Laura Frigerio, Kellie Marks, Argy Krikelis

 114-132

Real-Time Biologically-Inspired Image Exposure Correction.

Vassilios Vonikakis, Chryssanthi Iakovidou, Ioannis Andreadis

 133-153

A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters.

Andre Guntoro, Manfred Glesner

 154-173

On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters.

Gian-Carlo Cardarilli, Alberto Nannarelli, Marco Re

 174-190

Time Efficient Dual-Field Unit for Cryptography-Related Processing.

Alessandro Cilardo, Nicola Mazzocca

 191-210

A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs.

Kostas Siozios, Dimitrios Soudris

 211-231

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication.

Vincenzo Rana, David Atienza, Marco D. Santambrogio, Donatella Sciuto, Giovanni De Micheli

 232-250

Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems.

Nikolas Kroupis, Dimitrios Soudris

 251-270

Timing Error Detection and Correction by Time Dilation.

Andreas Floros, Yiorgos Tsiatouhas, Xrysovalantis Kavousianos

 271-285